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APU Floating-Point Unit v3.1

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Product Specification

March 11, 2008

Introduction

The Xilinx Auxiliary Processor Unit (APU) Float- ing-Point Unit LogiCORETM is a single-precision float- ing-point unit designed for the PowerPCTM 405 embedded microprocessor of the VirtexTM-4 FX FPGA family. It is tightly coupled to the PowerPCTM core with the APU interface. The FPU is not Power-ISA compliant and provides support for floating-point arithmetic operations in single precision only. With compiler mod- ifications provided by Xilinx, single-precision floating point instructions can be executed to achieve increased performance over software emulation.

Features

  • Compatible with the IEEE-754 standard for single-precision floating-point arithmetic, with minor and documented exceptions PowerPC floating-point instructions

Resources Used

Slices

Xtreme-DSP

Block

Blocks

RAMs

Lite (no div/sqrt)

1300

4

2

Full (with div/sqrt)

1600

4

2

-10 part

233 MHz

-11 part

275 MHz

-12 part

333 MHz

Virtex-4 FX

Supported Device Family

LogiCORE Facts Core Specifics

Clock Speeds

Provided with Core

Documentation

Product Specification

Design File Formats

VHDL

Constraints File

UCF (user constraints file)

Verification

VHDL Test Bench

Instantiation Template

VHDL Wrapper

arithmetic latency and decrease cycles per instruction

http://www xilinx com/products/ .. f Re erence Design ipcenter/DO-DI-FPU-SP.htm

for increased flexibility

Design Tool Requirements

Xilinx Implementation Tools

I S E T M 9 . 1 i

high-performance DSP features

(EDK) design flow

Verification

ModelSim® PE 5.4e

Simulation

ModelSim PE 5.4e

Synthesis

XST

QinetiQ ltd.

Support Provided by Xilinx, Inc @ www.xilinx.com

© 2006 Xilinx, Inc. All rights reserved. XILINX, the Xilinx logo, and other designated brands included herein are trademarks of Xilinx, Inc. All other trademarks are the property of their respective owners. Xilinx is providing this design, code, or information "as is." By providing the design, code, or information as one possible implementation of this feature, application, or standard, Xilinx makes no representation that this implementation is free from any claims of infringement. You are responsible for obtaining any rights you may require for your implementation. Xilinx expressly disclaims any warranty whatsoever with respect to the adequacy of the implementation, including but not limited to any warranties or representations that this implementation is free from claims of infringement and any implied warranties of merchantability or fitness for a particular purpose. The QinetiQ logo is a trademark of QinetiQ ltd.

March 11, 2008 Product Specification

www.xilinx.com

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