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2.1

Clock . . . .

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2.2

Serial UART

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2.3

DAC UART

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2.4

MP3 UART .

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2.5

MMU . . . .

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MP3-Controller-On-Chip (MP3CoC)

10 Conclusions

3

On the Free6502 processor

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Memory layout

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Firmware

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Firmware upgrade

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Synthetization

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Place and Route

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Fabrication and testing

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H kan Kvist, d00hk@efd.lth.se Linus Walleij B.S.Sc., d00lw@efd.lth.se

    • 9.1

      Preparations . . . . . . . . . . . . . . . .

    • 9.2

      First impressions . . . . . . . . . . . . .

    • 9.3

      Fixing the problems . . . . . . . . . . . .

    • 9.4

      Yield . . . . . . . . . . . . . . . . . . . .

    • 9.5

      Current dissipation and critical voltage

December 8, 2004

bstract

This implementation of the SoC MP3 controller features a microprocessor based on the Free6502 free IP-core, with 1 KB RAM, and I/O ports to control peripherals. The chip also features such as UART:s, Memory Management Unit and a DMA controller.

Contents

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2

rchitectural overview

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Introduction

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Related materials

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