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NXP Semiconductors

Product specification

Economy audio CODEC for MiniDisc (MD) home stereo and portable applications

UDA1341TS

7.9

Decimation filter (ADC)

7.12

Interpolation filter (DAC)

The decimation from 128fs is performed in two stages.

sin x The first stage realizes 3rd order ----------- characteristic, x

The digital filter interpolates from 1fs to 128fs by means of a cascade of a recursive filter and a Finite Impulse Response (FIR) filter.

decimating by 16. The second stage consists of 3 half-band filters, each decimating by a factor of 2.

Table 2

Decimation filter characteristics

ITEM

CONDITIONS

VALUE (dB)

Passband ripple

0 to 0.45fs

±0.05

Stop band

>0.55fs

60

Dynamic range

s 0 to 0.45f

108

Overall gain

input channel 1;

1.16

0 dB input

7.10

Overload detection (ADC)

This name is convenient but a little inaccurate. In practice the output is used to indicate whenever that output data, in either the left or right channel, is bigger than 1 dB (actual figure is 1.16 dB) of the maximum possible digital swing. If this condition is detected the OVERFL output is forced HIGH for at least 512fs cycles (11.6 ms at fs = 44.1 kHz). This time-out is reset for each infringement.

7.11

Mute (ADC)

Passband ripple

0 to 0.45fs

±0.03

Stop band

>0.55fs

50

Dynamic range

s 0 to 0.45f

108

VALUE (dB)

Table 3

Interpolation filter characteristics

ITEM

CONDITIONS

7.13

Peak detector

In the playback path a peak level detector is build in. The position of the peak detection can be set via the L3-interface to either before or after the sound features. The peak level detector is implemented as a peak-hold detector, which means that the highest sound level is hold until the peak level is read out via the L3-interface. After read-out the peak level registers are reset.

7.14

Quick mute

A hard mute can be activated via the static pin QMUTE. When QMUTE is set HIGH, the output signal is instantly muted to zero. Setting QMUTE to LOW, the mute is instantly de-activated.

On recovery from power-down or switching on of the system clock, the serial data output on pin DATAO is held at LOW level until valid data is available from the decimation filter. This time depends on whether the DC-cancellation filter is selected:

  • DC cancel off:

; t = 2 3 . 2 m s a t f s = 4 4 . 1 k H z t 1 0 2 4 f s - - - - - - - - - - - - =

7.15

Noise shaper (DAC)

The 3rd-order noise shaper operates at 128fs. It shifts in-band quantization noise to frequencies well above the audio band. This noise shaping technique allows for high signal-to-noise ratios. The noise shaper output is converted into an analog signal using a filter stream digital-to-analog converter.

  • DC cancel on:

; t = 2 7 9 m s a t f s = 4 4 . 1 k H z . t 1 2 2 8 8 f s - - - - - - - - - - - - - - - =

2002 May 16

8

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