Fundamental limits on Serial Computing: Three “Walls”
Increasingly, microprocessor performance is limited by achievable power dissipation rather than by the number of available integrated-circuit resources (transistors and wires). Thus, the only way to significantly increase the performance of microprocessors is to improve power efficiency at about the same rate as the performance increase.
Conventional processors require increasingly deeper instruction pipelines to achieve higher operating frequencies. This technique has reached a pointof diminishing returns, and even negative returns if power is taken into account.
On multi-gigahertz symmetric processors --- even those with integrated memory controllers --- latency to DRAM memory is currently approaching 1,000 cycles. As a result, program performance is dominated by the activity of moving data between main storage (the effective-address space that includes main memory) and the processor.