210247: DIGITAL ELECTRONICS LABORATORY
Teaching Scheme Examination Scheme
Practical: 4 hrs/week Term Work: 25 Marks
Practical: 50 Marks
Suggested List of Assignments
A. Combinational Logic Design
T.T.L Characteristics (Study and Write up only)..
Code converters, e.g. Excess-3 to BCD and vice versa
Multiplexers: Application like Realization of Boolean expression using Multiplexer.
Demultiplexers: Application like Realization of ROM using Demultiplexer.
BCD adder / subtractor using 4 bit binary adder 7483.
Parity generator / detector.
B. Sequential Circuit Design
Flip flops, Registers and Counters (Study and Write up only).
4-bit Multiplier / Divider (Study and Write up only).
Ripple counter using flip-flops.
Sequence generator using JK flip-flop.
Sequence detector using JK flip-flop.
Up-down counter using JK flip-flop.
Modulo N counter using 7490 & 74190 (N>10).
Pseudo random number generator using 74194.
Design of a barrel shifter.
Study of PSpice/Electronic Workbench/ICAP software and simulation using the software.
C. Algorithmic State Machines
Simple ASM using multiplexer controller method.
Design and implementation of digital circuits using RTL (Data section using 74xx series chips and control section using shift register controller and classical methods).
Implementation of Hex key pad reader using Counter, Multiplexer, Latch and Combinational circuit.
Implementation of combinational logic using PALs.
Study of FPGA devices (Study and Write up only).
Students will submit the term work in the form of journal consisting of minimum of 16 assignments. Practical examination will be based on the term work and questions may be asked to judge the understanding of assignments performed at the time of examination.