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High-Speed Memories:Cache Memory, organization and Mapping, Interleaved and Associative Memories, Replacement Algorithms, Performance Characteristics.(4 Hrs)

I/O Organization

External Devices, Accessing I/O devices, I/O modules, Programmed v/s Interrupt driven I/O, DMA and Interrupts, Buses and standard Interfaces, I/O Channels and Processors.       (3 Hrs)

UNIT VI

Multiprocessor Configurations

Closely coupled and loosely coupled multiprocessor architectures, Problems of bus contentions, Interprocess Communications, Coprocessor and I/O Processor, Bus controller, Bus Arbitration, System Bus-Uni-Bus, Multibus.                     (4 Hrs)

RISC and SUPERSCALAR PROCESSORS

RISC- Features, Register File, RISC v/s CISC, Superscalar Processors- Overview, Organization                     (2 Hrs)

Text Books:

1.

C. Hamacher, V. Zvonko, S. Zaky, “Computer Organization”, 2nd Edition, McGraw Hill, 2002 ISBN 0 – 07 – 232086 – 9.

2.

W. Stallings, “Computer Organization and Architecture: Designing for performance”, 6th Edition, Prentice Hall of India, 2003, ISBN 81 – 203 – 2103 – 0

Reference Books:

1.

W. Stallings William, “Computer Organization and Architecture: principles of structure and function”, 2nd Ed, Maxwell Macmillan Editions, 1990 ISBN 0 – 02 – 946297 – 5 (Chapter: 2,3,4,5,7,8,9,10,11,12,13,14).

2.

A. Tanenbaum, “Structured Computer Organization”, 4th Ed, Prentice Hall of India, 1991 ISBN 81 – 203 – 1553 – 7 (Chapter: 1,4,5,6,8).

3.

J. Hays, “Computer Architecture and Organization”, 2nd Edition, McGraw-Hill, 1988 ISBN 0 – 07 – 100479 – 3

4.

G. George, “Computer Organization: Hardware and Software”, 2nd Edition, Prentice Hall of India, 1986 (Chapter: 3,4,5).

5.

D. Paterson, J. Hennesy, “Computer Organization and Design: The Hardware Software Interface”, 2nd Edition, Morgan Kauffman, 2000 ISBN 981 – 4033 – 588.

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