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210243: DIGITAL ELECTRONICS AND LOGIC DESIGN

Teaching scheme                      Examination scheme

Lectures: 3 Hrs/week          Theory: 100 Marks

Prerequisite: Basic Electronics Engineering (Subject Code: 104011)

Learning Objectives

1.

To learn and understand basic digital design techniques

2.

To learn and understand design and construction of combinational and sequential circuits

UNIT 1:

Number Systems and Codes:

Introduction, Binary number System, Binary to decimal conversion and vice versa, signed binary numbers: Sign-Magnitude representation, One’s and Two’s complement representation, Binary arithmetic, 2’s complement arithmetic, Hexadecimal numbers, Octal numbers, BCD code, Excess-3 code, Gray code. Error detecting and correcting codes

BOOLEAN ALGEBRA: Axiomatic definition of Boolean algebra, Basic theorems and properties                                                                                                                           (6 Hrs)

UNIT 2:

Logic Families

Characteristics of Digital Ics: Speed, Power dissipation, fan-out, current and voltage parameters, noise margin, operating temperature etc., TTL: Operation of TTL NAND gate, Standard TTL, TTL Characteristics, Active pull-up, Wired-AND, totem pole, open collector, Unconnected Inputs. CMOS Logic: CMOS Inverter, CMOS NAND and NOR, CMOS characteristics. Wired-logic, Unconnected Inputs, Open-Drain Outputs, Comparison of TTL and CMOS, interfacing TTL to CMOS and vice versa, tri-state logic

Study of Digital ICs- 7400, 7402, 7404, 7408, 7432, 7483, 7485, 7486, 74138, 74153, 74244

    (6 Hrs)

UNIT 3:

Combinational Logic

Introduction, Standard representations for logical functions: K-Map: Representation of truth-table, SOP form, POS form, Simplification of logical functions, Minimization of SOP and POS forms, Don’t care conditions, Design Examples: Arithmatic Circuits, BCD-to-7-segment Decoder etc.

Design Using MSI Circuits: Half adder and subtractor, full adder and subtractor, BCD adder and subtractor, look ahead and carry, ALU, code converters, parity generator and checker, magnitude comparator, multiplexers, demultiplexers, decoders, Priority encoders         (6 Hrs)

UNIT 4:

Sequential Logic

Flip-Flops: Introduction, 1-Bit Memory cell, Clocked S-R filp-flop, JK flip flop: Race-Around condition, Master slave JK flip-flop, D flip-flop and T flip-flop, Edge-triggered flip-flops, Applications of flip-flops: Bounce-elimination switch, registers, counters and Random Access memory

Sequential Logic design: Introduction, Registers and shift registers, applications of shift registers: Serial-to-Parallel, Parallel-to-Serial, ring counters, Sequence

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