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Application Note 34

(7a) ML4824 Test Res lts

(7b) ML4819 Test Res lts

Figure 7. Comparison of Leading/Trailing Edge Modulation (Fig. 7a) to Trailing Edge Modulation only (Fig. 7b). (Middle traces are output ripple voltage.)

15

2

4

3

V

FB

I

2.5V AC

V

RMS

I

SENSE

RAMP 1

16

VEAO

VEA

3.5k

+

GAIN MODULATOR

+

3.5k

IEA

IEAO

1

POWER FACTOR CORRECTOR

+

2.7V

–1V

OVP +

+

PFC I

LIMIT

S

Q

R

Q

S

Q

R

Q

PFC OUT

12

V

CCZ 13.5V

7.5V REFERENCE

V

REF

14

13

V

CC

7

OSCILLATOR

x2

8

RAMP 2

(-2 VERSION ONLY)

DUTY CYCLE LIMIT

8V

V

DC

1.25V

6

+

PWM OUT

5

9

V

CC

SS

50µA

8V

DC I

LIMIT

+

VFB

2.5V

+

PULSE WIDTH MODULATOR

V

IN

OK

1V

+

DC I

LIMIT

V

CCZ

S

R

UVLO

Q

Q

11

Figure 8. ML4824 Block Diagram.

6

REV. 1.0 11/17/2000

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