shown that the length of the N, does not improve performance of the system without an iterative
detectors, it just helps it converge to a max faster (see Figure 6 on page 18). By varying the N
from 2 to up the 32 used in Figure 16 on page 36, the only change found was the lower SNR at
values when they are beginning to that if N was very large. The likely reason that the increase N
does not help the performance is that it also increases the chances that one of the chips in the
sequence is going be jammed.
This chapter examined the worst-case jamming of a SESS system with an iterative
detector. It achieved a performance gain of 6 db over the SESS system without the detector.
The worst-case jamming line of a SESS without detector is close to that of Rayleigh fading, so
the 6 db improvement of the iterative detector falls short of the 15 db it adds to Rayleigh fading.
The difference in the performance can likely be attributed to the differences in jamming and
fading models. The effects of jamming can be seen in the hard decision made on the receiver
side. To help combat the worst-case jamming that occurs at low ρ, a method needs to be
investigated that stops the jammed chip from heavily contributing to the final bit decision.