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Microsoft Windows Logo Program System and Device Requirements  —  44

A5.1.3 64-bit version of Windows Server 2003: Standard Error Record Format passed by the SAL to the operating system

All Error Records passed by the System Abstraction Layer (SAL) to the operating system for all fatal and corrected CPU and Platform Machine Check Architecture (MCA) Events must be, at a minimum, compliant with the Itanium Processor Family System Abstraction Layer Specification (SAL 3.0). The SAL must maintain the Error Records in non-volatile storage across system reboots and power cycles. See Appendix B, “Error Record Structures,” in SAL 3.0 specification, dated January 2001.

A5.2 Itanium-based System - Industry Standards

Note: This list provides complete titles and web locations for references cited. The listing of a reference here does not imply that complete compliance with that reference is a Windows Logo Program requirement.  

A5.2.1 Advanced Configuration and Power Interface Specification, V. 2.0


A5.2.2 Extensible Firmware Interface Specifications


A5.2.3 EFI-related specifications and guidelines

http://www.microsoft.com/hwdev/platform/firmware/efi/ Including: Microsoft Extensible Firmware Interface FAT32 File System Specification Microsoft Extensible Firmware Interface Long File Name Specification Microsoft Portable Executable and Common Object File Format Specification

A5.2.4 Intel Itanium Processor Family System Abstraction Layer Specification (SAL 3.0)


A5.3 Itanium-based System - Quality

WHQL Test Specification References: Chapter 2: EFI Test Specification; Plus technology-specific test specifications

See A1.3.

A5.3.1 Pass Windows Logo Program testing for Itanium-based products

Product is submitted to the appropriate WHQL test program and passes all testing for the Windows Logo Program for hardware as described in detail in the WHQL Test Specification and the Microsoft Windows Hardware Compatibility Test Kit documentation.

A5.4 Itanium-based System - Windows Experience

A5.4.1 Comply with ACPI 2.0

For an Itanium-based system in which more than one processor can be installed, the system must employ those processors symmetrically; that is, all processors must be able to access all I/O buses and system memory, and cache coherency must be maintained. The system must also comply with the ACPI 2.0 specification.

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