Microsoft Windows Logo Program System and Device Requirements — 75
Systems must be capable of delivering 375 mA at 3.3V to all PCI slots on a power-managed bus segment whenever the PCI bus is in any “bus powered” state: B0, B1, or B2.
B18.104.22.168.2 PCI add-on cards that use 3.3 Vaux operate correctly, using a method such as the one described in Section 7.4.4 of PCI-PM 1.1.
PCI add-on cards that use 3.3Vaux must operate correctly. This applies when the system supports 3.3Vaux to the PCI connectors.
B22.214.171.124.3 Bus power states are correctly implemented.
The PCI bus and all add-on capable devices on the PCI bus must comply with PCI Bus Power Management Interface Specification, Revision 1.1 or later. This includes correct implementation of the PCI configuration space registers used by power management operations, and the appropriate device state (Dx) definitions for the PCI bus and all add-on-capable devices on the PCI bus. ACPI is not an acceptable alternative.
B126.96.36.199.4 See B188.8.131.52
B2.5.5 PCI Controllers/Devices - FAQs
B184.108.40.206 Current PCI-related FAQs
Related requirement deleted.
B220.127.116.11 Updated at B18.104.22.168.1
B22.214.171.124 Updated at B126.96.36.199.1
B188.8.131.52 Updated at B2.5.4
B184.108.40.206 3.3 Updated at B2.5.4
B2.5.R PCI Controllers/Devices - Future Requirements
Announcement of additional future requirements will be published at http://www.microsoft.com/winlogo/hardware/.
B2.5.R.1 PCI Subsystem IDs and PCI-to-PCI bridge devices
See "PCI Subsystem IDs and PCI-to-PCI Bridge Devices" at http://www.microsoft.com/hwdev/bus/pci/pcibridge.asp.
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