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Motherboard design

135

11.9 Clock rates

The system board runs at several clock frequencies. These are:

Processor speed, suc PCI bus speed. 24 or 48 MHz. USB. 12 MHz. Keyboard.

h as 66 MHz.

  • 24 MHz. Floppy clock.

  • 14 MHz. ISA bus OSC.

  • 8 MHz. ISA bus clock.

The ICS9159-02S IC provides for each of these clock speeds. The input to the device is a 14.31818 MHz crystal clock, as illustrated in Figure 11.6. Two jumpers (Jumper 1 and Jumper 2) set the system speed. These set the system clock speed to either 50 MHz, 60 MHz or 66 MHz.

SEL0

14MHz

SEL1

14MHz

V CC

1

3

Jumper 1

1

GND

Jumper 2

3

0

0

Reserved

0

1

66MHz 33MHz

1

0

60MHz 30MHz

1

1

50MHz 25MHz

GND

SEL0 SEL 1 PCLK BCLK

14.31818MHz

X1

X2

ICS9159

24MHz 24MHz 12MHz

OSC (APIC) PIIX3OSC (ISA) HCLKTXC HCLKCPU HCLKSRAM0 HCLKSRAM1 PCLKTXC USBCLK AIPCLK KBD_CLK

Figure 11.6

Clock generator device.

11.10 ISA/IDE interface

The IDE and ISA busses share several data, address and control lines. Figure 11.7 shows the connections to the busses. A multiplexor (MUX) is used to select either the ISA or IDE interface lines. The IDE interface uses the DD[12:0] and LA[23:17] lines, and the ISA uses these lines as SBHE , SA[19:8], CS1S, CS3S, CS1P, CS3P and DA[2:0].

The IDE adapter is a 40-pin header connector. It is thus very easy to insert in the wrong way or to the wrong pins. For this reason all the input and output pins are short- circuit protected. The data lines connect to the IDE through 22 resistors and are pulled-up with 4.7 Kresistors, and the address lines connect to the IDE through 33 resistors.

11.11 DMA interface

The PIIX3 device incorporates the functionality of two 8237 DMA controllers to give seven independently programmable channel (Channels 0–3 and Channels 5–7). DMA channel 4 is used to cascade the two controllers and defaults to cascade mode in the DMA channel mode (DCM) register. Figure 11.8 shows the interface connections and that DMA channel 4 is used for the cascaded controller.

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