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# Modeling Combinational Logic: Logical Operators

// File: xor_gates.h #include “systemc.h” const int SIZE=4;

• ^ - xor

• & - and

• | - or

SC_MODULE(xor_gates) { sc_in<sc_uint<SIZE> > bre, sty; sc_out <sc_uint<SIZE> > tap; void prc_xor_gates();

SC_CTOR(xor_gates) { SC_METHOD(prc_xor_gates);

sensitive << bre << sty;

}

}

// File: xor_gates.cpp #include “xor_gates.h”

v o i d b i s t _ c e l l : : p r c _ x o r _ g a t e s ( ) tap = bre.read() ^ sty.read(); } {

• A. Milenkovic

Modeling Combinational Logic: Arithmetic Operations

s c _ u i n t < 4 > w r i t e _ a d d r ; s c _ i n t < 5 > r e a d _ a d d r ;

r e a d _ a d d r = w r i t e _ a d d r + r e a d _ a d d r ;

• Note: all fixed precision integer type calculations occur on a 64-bit representation and appropriate truncation occurs depending on the target result size

• E.g.:

• write_addr is zero-extended to 64-bit

• read_addr is sign-extended to 64-bit

• + is performed on 64-bit data

• result is truncated to 5-bit result

a n d a s s i g n e d b a c k t o r e a d _ a d d r

• A. Milenkovic

Modeling Combinational Logic: Unsigned Arithmetic

# // File: u_adder.h #include “systemc.h”

SC_MODULE(u_adder) { sc_in<sc_uint<4> > a, b;

sc_out <sc_uint<5> > sum; void prc_u_adder(); SC_CTOR(u_adder) {

SC_METHOD(prc_u_adder); sensitive << a << b;

}

};

// File: u_adder.cpp #include “u_adder.h”

v o i d u _ a d d e r : : p r c _ s _ a d d e r ( ) sum = a.read() + b.read(); } {

• A. Milenkovic

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