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SOME VTRAN CONCEPTS AND CONVENTIONS

BUS/VECTOR Notation:

Single Bus bit:DBUS[5]

Multibit Bus:DBUS[31:0]

EXAMPLE: INPUTS PINA, PINB, DBUS[7:0] ;

BIDIRECTS BIDI[7:4];

Pre-Defined Signal Groups:

ALL_INPUTS { all input pins and input versions of bidirects }

ALL_OUTPUTS { all output pins and output versions of bidirects }

PURE_INPUTS { all pure input pins }

PURE_OUTPUTS { all pure output pins }

BIDIR_INPUTS { all input versions of bidirect pins }

BIDIR_OUTPUTS { all output versions of bidirect pins }

EXAMPLE:  STATE_TRANS  ALL_INPUTS = ‘U’->’1’, ‘D’->’0’;

MASK_PINS BIDIR_OUTPUTS @ 0, 2000 ;

Bidirectional Signals:

For each bidirectional signal, vtran creates 2 signals:  pin  and  pin.O.  For example

BIDIRECTS  abc,  xyz[3:0] ;

This creates the following signal names,

bidir_inputs:abc, xyz[3:0]

bidir_outputs:abc.O, xyz.O[3:0]

Example of use:STATE_TRANS abc.O, out1, out2 = ‘1’->’H’,‘0’->’L’;

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