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PROCESSING VECTOR DATA

SOME EXAMPLES:

EXAMPLE 1 – Vector data in OVF is cycle-based (WGL).  Process data for Credence tester.

  .  .  .

PROC_BLOCK

 BEGIN

 STATE_TRANS '-'->'X';

 STATE_TRANS OUTPUTS '0'->'L', '1'->'H';

 END;

TVF_BLOCK

   .  .  .

EXAMPLE2:  Vector data in OVF is event-driven VCD (print-on-change).  Process to first create cycle-based vectors with one vector per cycle, next separate bidirect states, then specify new timing for output vector file.

.  .  .

PROC_BLOCK

 BEGIN

 CYCLE 250;

{ collapse to cycle-based vectors }

 ALIGN_TO_CYCLE 250 ALL_INPUTS @ 100,

                    PURE_OUTPUTS @ 225,

                    BIDIR_OUTPUTS @ 200;

     { separate bidirect data }

 BIDIRECT_CONTROL sig[8:2] = input WHEN evol = 1;

{ now define new timing for output file }

 PINTYPE  NRZ  PURE_INPUTS @ 50 ;

 PINTYPE  NRZ  BIDIR_INPUTS @ 10;

 PINTYPE  RZ  clk1 @ 125, 175;

 PINTYPE  RO  clk1n @ 120, 180;

 PINTYPE STB * @ 220, 240 ;

 STATE_TRANS OUTPUTS '1'->'H', '0'->'L';  { map states }

 END;

TVF_BLOCK

   .  .  .

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