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A Prototype Optical Tracking System Investigation and Development - page 80 / 170





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Black Spot Hardware

the Soft Hub if this functionality were programmed into the Soft Hub.


Programming and debugging the Blackfin

The Blackfin has an on-board JT G interface that is exposed using the JT G header on the PCB. The 7 by 2 pin JT G header allows program execution to be controlled and the program variables to be studied. This is achieved using the software development envi- ronment and a hardware adapter. The firmware can be loaded into the camera module for execution by either using the hardware JT G adapter or from the flash memory. During development the firmware is loaded using the JT G adapter as this allows software revi- sions to be loaded and debugged quickly. Once a stable version of firmware is ready it is loaded into the flash memory on the PCB. The flash memory is a non-volatile storage meaning that the memory contents remain intact without continuous power. Powering up the module results in the program code being copied from the flash to the Blackfin’s inter- nal program memory by a bootloader. This is a small program that resides in a boot ROM in the Blackfin designed specifically for initialising the Blackfin. Execution of the code begins once this is complete. The JT G adapter chosen is the ICEbear from the Swiss com- pany ‘Section5’ [72]. This debugger integrates with the software environment described in Chapter 4 and connects via USB to the JT G header.


Power supplies and clocks

There are three power supplies and two major clock signals present in the design. The power supplies are 5 V, 3.3 V, and 1.2 V. The design is powered using 5 V and this is pro- vided through the communications header. This is regulated to 3.3 V by a linear regulator.

buck converter controlled by the Blackfin regulates this again to 1.2 V. The Blackfin re- quires both 3.3 V and 1.2 V to operate. The I/O pins of the Blackfin operate at 3.3 V logic levels while internally the core operates at 1.2 V.

The Blackfin is clocked using a 10 MHz crystal. Internally this is scaled to provide a core clock frequency of


= 10 × 106 × 43 = 430 MHz.


This ensures that the Blackfin can provide a clock signal to the image sensor. The Blackfin peripherals operate at a lower frequency, referred to in the data sheet as the system clock

frequency. The core clock is divided by 4 to give the system

clock of



4 CCLK = 107.5 MHz.


The system clock is used to clock a Blackfin timer peripheral that provides a further divi- sion by 4. The output of the timer is used to clock the image sensor and is a square wave

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