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Principles of Top-Down Design

Principles of Top-Down Mixed-Signal Design

the system designers from the circuit designers, and the circuit designers from each other. Without a reliable communication channel, designers resort to using verbal or written specifications, which are often incomplete, poorly communicated, and forgotten half way through the project. It is the poor communication process that creates many of the errors that force respins, and the separation that allows the errors to hide until the design is available as silicon.

To overcome these issues, one needs a design methodology that

  • 1.

    Improves communications between designers (between system and block designers, between block designers, between current designers and future designers (to support reuse).

  • 2.

    Eliminates the discontinuity that acts to hide errors and separate the system design- ers from the block designers.

  • 3.

    Improves verification so that it finds the errors that cause respins, and finds them ear- lier so that they are less disruptive and easier to fix.

  • 4.

    Improve designer effectiveness.

  • 5.

    Reorganize the design tasks, making them more parallel and eliminating long serial dependencies.

  • 6.

    Reduce the need for extensive transistor-level final verification.

  • 7.

    Eliminate respins!

RF designers typically use this type of primitive top-down design approach. They begin with the system design. Typically using a spreadsheet, the gain, noise figure and distor- tion budget is explored, and with the help of guides like the Friis equation, is shared amongst the various blocks of the receiver. The design is then iterated until the perfor- mance of the system as predicted by the spreadsheet is met and the performance require- ments on the blocks are reasonable. At this point, the design proceeds bottom-up relying solely on transistor-level design. Eventually, the spreadsheet is updated with the actual values coming from the transistor-level simulation, and if the system performance is not satisfactory the process repeats. The problem is that even when using the updated results, the performance predicted by the spreadsheet will not match the results achieved in silicon. This happens because of miscommunications, either in the meaning or the actual values of the block specification, and because the system-level description is crude and does not account for things like loading effects. When designing non-inte- grated receivers this is not as problematic because all the stages are generally designed for power matching and the voltage supply is reasonably high (Vdd 5 V). In CMOS design the voltage supply is low (1.2 V in a 0.13 μm process) and the blocks do not share matched impedances. The result, of course, is that multiple silicon iterations are needed to achieve the required system performance levels.

4 Principles of Top-Down Design

A well designed top-down design process methodically proceeds from architecture- to transistor-level design. Each level is fully designed before proceeding to the next and each level is fully leveraged in design of the next. Doing so acts to partition the design into smaller, well defined blocks, and so allows more designers to work together pro- ductively. This tends to reduce the total time required to complete the design. A top- down design process also formalizes and improves communications between designers.

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