Principles of Top-Down Mixed-Signal Design
The semiconductor industry’s growing ability to integrate functionality onto silicon requires that both the digital and analog circuits be increasingly integrated on the same chip. ASIC analyst Handal Jones predicts that by 2006 70% of ASICs will contain ana- log content, up from 17% in 1998.
Mixed signal plays, or will soon play, a critical role in every high-value market served by the electronics industry. In networking and wireless communications, it plays a cen- tral role. All communications systems must interface to the physical communications media, and those media are, by definition, analog. In addition, mixed-signal design is key to overcoming the communication bottlenecks that exist in all high-performance computing systems.
While mixed-signal circuitry is traditionally confined to the periphery of electronic sys- tems, the amount of periphery is growing and invading the core. Previously, the mixed- signal content existed only at the periphery of the entire electronics system. Now, it is proliferating to the periphery of individual chips and will eventually propagate to the periphery of individual blocks within the chip itself. Increasing performance require- ments for the overall system are requiring that the various parts of the circuit communi- cate more quickly. In the past, communication largely occurred over relatively slow externally-clocked buses. Now, design activity is focused on utilization of high-speed self-clocked serial links. For a given data transfer rate, the frequencies present in serial links are much higher than those found in busses and should reach 4-10 GHz within the next year or so. Because of the frequencies involved, and the fact that the signals travel over long non-ideal channels, each of these links involves a substantial amount of mixed-signal circuitry. As a result, virtually every chip within a computer will have a significant mixed-signal content. Unlike with many existing mixed-signal applications, such as wireless communications, in this case it is not possible to separate the mixed- signal circuitry onto a separate chip.
As an example of the trend toward the increasing use of mixed signal circuitry on previ- ously all digital chips for high speed I/O, consider the new Stratix-GX high-end FPGA from Altera. It is a high-density programmable logic device, which are traditionally purely digital devices, but this one includes up to 45 1 Gb/s source synchronous I/O channels for chip-to-chip communications and up to 20 full duplex 3.125 Gb/s asyn- chronous transceiver channels for system-to-system communications.
The mixed-signal design process has changed relatively little over the past two decades, and in comparison to the digital design process, is slow, labor intensive, and error prone. While digital designers have improved their design methodology and adopted design automation, analog and mixed-signal designers by and large have not.
There are two reasons why digital designers are far ahead of analog designers in improving their design processes. First, digital designers confronted the need to design very large and complex systems much earlier than analog designers. Consider that large digital chips today consist of tens of millions of transistors, while complex analog chips contain only tens of thousands of devices. Second, the digital design problem is much more amenable to automation than the analog problem.
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