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8 / JANUARY 2005


Startup Profiles

(Continued from page 7)

available in two formats: 7” x 5.5” and 8.5” x 11” and offers retailers the flex- ibility to present content incorporating any font style, logo or language.

SignSync Messaging software allows the creation, scheduling and transmis- sion of time sensitive information to SyncroSign Message Board eSigns. SignSync provides retailers the power of true dynamic pricing, while insur- ing consumers of pricing integrity on their purchases. With Gyricon, retail- ers can link and synchronize their signs with the rest of their retail communi- cations and data, allowing them to change product names, prices and de- scriptions electronically.

Gyricon is targeting the corporate, hos- pitality, education and medical markets and has completed pilot tests of its so- lution with several major retail and media organizations, including Macy’s East and Dow Jones & Company. Xe- rox Global Services is a sales and mar- keting alliance partner. SyncroSign Message board pricing ranges from $1,295 to $1,495.

Dr. Hervé Gallaire, Chairman (Presi- dent, Xerox Innovation Group)

Bryan Lubel, President and CEO (pre- viously COO of Avery Group, EVP of sales and marketing at the Suth- erland Group, and VP & GM of North American operations for the Xerox Channels Group)

Howard Dennis, VP and CFO (previ- ously held various financial respon- sibilities for over 15 years, at both an operations and corporate level at Xerox)

Dr. Robert Sprague, VP and CTO (pre- viously Interim CEO and Xerox’s manager of the Document Hardware Laboratory)

Chris Cosgrove,, VP of Sales and Cus- tomer Operations (most recently on

the sales and marketing launch team for Xerox’s DocuColor iGen3 Dig- ital Press)

Russ Smith, VP of Manufacturing, Operations and Development (pre- viouslyVP of Operations at Isolatek International and GM for Carborun- dum’s Microelectronics and Sub- strates Divisions)

Nicholas Sheridon, Research Director (the inventor of SmartPaper while at Xerox Research Labs where he was a senior research fellow)

6190 Jackson Road Ann Arbor, MI 48103 Tel: 734.822.7600 Fax: 734.222.8231 www.gyricon.com

Mobius Microsystems

Mobius Microsystems was launched in 2002 to develop clock generation ar- chitectures and free-running compen- sation techniques that permit the complete integration of the clock gen- eration function, without sacrificing power or performance. The company has raised just $1 million to date from angel investors and is currently seek- ing a more significant Series A round. Mobius has 9 employees and will soon be adding additional personnel for a new project.

Today, two distinct clock generation approaches exist: phase (or delay) locked and free-running. From these approaches, three distinct implemen- tations of clock generators exist: dis- crete, hybrid and monolithic. Phase-locked crystal-referenced sys- tems cannot be implemented in mono- lithic form because the crystal reference is incompatible with the ac- tive device process technology, such as CMOS.

Free-running clocks can be implement- ed in both discrete and monolithic form, and on-chip implementation have been gaining broader acceptance.

However, most free-running approach- es are based on ring, phase shift or re- laxation oscillators, which suffer from low available output frequency, poor frequency accuracy, poor temperature and bias stability, and poor short-term frequency stability or jitter. In addition, some of these implementations still require off-chip passive components.

Mobius has developed and patented clock generation architectures and free-running compensation techniques that permit the complete integration of the clock generation function, without sacrificing power or performance. Mo- bius’ Copernicus technology delivers the best aspects of a phase-locked crys- tal-referenced clock generator while also delivering the benefits of an inte- grated free-running monolithic ap- proach.

The Copernicus Clocking Solution is a completely integrated clock genera- tor macro for a broad range of IC ap- plications. Copernicus enables IC designers to instantiate the entire clock generation function on-chip. Coperni- cus supports a broad frequency range from kHz to GHz with frequency ac- curacy of ±0.75% out-of-fab and even greater with frequency trimming. It also features ultra-low jitter. Other fea- tures include small silicon footprint, in- stantaneous frequency switching, temperature and bias stable, and near ideal 50/50 duty cycle.

The Copernicus Clocking Solution is all-silicon, pin-less, requires no off- chip reference or capacitance, and is significantly lower power than any al- ternative approach. Mobius argues that the average clocking approach costs from $0.50 - $3.00 per unit based on an external reference/resonator/crystal ($0.15 - 2.50), multiple pins for the IC interface ($0.20 - 0.40), and the on- chip PLL/DLL NRE costs. Copernicus is less than half the cost of these alter- native approaches that require extra

Copyright Pinestream Communications, Inc. 52 Pine Street, Weston, Massachusetts 02493 USA Tel 781.647.8800 Fax 781.647.8825 www.pinestream.com info@pinestream.com

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