THREE PHASE CONTROLLED RECTIFIERS
2.4.2 Digital implementation
Â Synchronous sampling 
In a digital current control system, the current is sample with interval Ts. To avoid electromagnetic interference (EMI) due to ON/OFF switchings of the valves, it is useful to synchronize the sampling with converter switching. Current sampling are taken in between switchings. This coincide with the positive and negative peak values of the triangular waveform.
Using synchronous sampling, approximately the mean value of the current is obtained. Thus, not only EMI is avoided, but also the current ripple is reduced. This method can be effective enough to avoid low pass filtering before sampling.
We will select the sample frequency as :
is the switching frequency,
Figure 2.14 : Asymmetric PWM – Synchronous sampling illustration 
Two samples can be acquired over each switching period. According to  a fast sampling enables higher bandwidth of the current controller, then it’s possible to reduce the sampling rate for
example to the switching rate :
2.4.3 Dead time effect
When we speak about implementation of converter, we need to inject deadtime (delay) in PWM signals to avoid short circuit in DC link (i.e. both transistor of one leg are conducting). The system becomes safer but, the performance are affected. This is temporary a loss of control. For example in an inverter, the output voltage waveform deviates from that for which it is originally intended. Since this is repeated over and over for every switching operation, its detrimental effect may become significant in PWM inverters that operate in high switching frequency. This is known as the deadtime effect. During the delay time, both transistors of the leg cease to conduct. Another consequence of the deadtime effect is the appearance of undesirable harmonics (  ). We can find several strategies for deadtime injection. An example is given below.