VOLTAGE ORIENTED CONTROL – SIMULATION
3.7 Phase Locked Loop (PLL)
The PLL is an important and critical part of the system. Its aim is to give the voltage angle of the three phase system (Ua Ub Uc Figure 2.4). This angle is then used for all the dq transformations in the model.
The PLL was design according (  ).
are gain parameters and
the error signal (
is the Ki, and
is the Kp of a PI
controller). The main difference is that in our case, with d oriented control, the error signal is
(chosen for flux oriented control).
Following the analysis of the thesis (or compendium), we can find the following PI parameters and the following scheme.
(3.52) (3.53) (3.54)
can be seen as the bandwidth of the PLL (rad/s), and
is the estimated “grid” voltage
Figure 3.38 : PLL scheme
The PI coefficients can be fixed or calculated in Simulink according to the estimated value (or
The reference value (
PI controller integrator.
) can be also included as a initial condition in the
The first selection of the PLL bandwidth is about 20Hz. It will be adjust later.
The model was implemented in continuous first, then in discrete using the following scheme for a discrete integrator :